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sn28835 1/2-inch ntsc timer socs023b february 1991 copyright ? 1991, texas instruments incorporated 1 post office box 655303 ? dallas, texas 75265 ? ntsc-timing operation ? solid-state reliability ? color and monochrome operation ? four selectable-antiblooming modes ? variable-integration-time option ? surface-mount package ? clamp-pulse select option ? horizontal and vertical resets for external synchronization description the sn28835 is a monolithic integrated circuit designed to supply timing signals for the texas instruments (ti ? ) 8-mm tc242/tc244 color and tc243/tc245 monochrome ccd image sensors. the sn28835 supplies both ccd-drive signals and ntsc-television synchronization signals at standard video rates. it requires a single 5-v supply voltage and a 14.318-mhz crystal-oscillator input. the sn28835 provides the user with several options including multiple antiblooming modes, variable-integration time, external synchronization, and delayed horizontal transfer. the sn28835 is designed to drive the ccd image sensor through intermediary level-shifting devices such as the ti tms3473b parallel driver and the sn28846 serial driver. it also supplies sample-and-hold signals for the ti tl1593 3-channel sample-and-hold circuit and multiplex signals for the ti tl1051 video preprocessor. the sn28835 ntsc synchronization-signal outputs include composite sync, composite blank, clamp, subcarrier, subcarrier delayed by 90 degrees, and burst flag. the sn28835 is supplied in a 44-pin plastic flat package and is characterized for operation from 20 c to 45 c. this device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fie lds. these circuits have been qualified to protect this device against electrostatic discharges (esd) of up to 2 kv according to mil-std-8 83c, method 3015; however, precautions should be taken to avoid application of any voltage higher than maximum-rated voltages to the se high-impedance circuits. during storage or handling, the device leads should be shorted together or the device should be placed in conductive foam. in a circuit, unused inputs should always be connected to an appropriated logic voltage level, preferably eith er v cc or ground. specific guidelines for handling devices of this type are contained in the publication guidelines for handling electrostatic-discharge-sensitive (esds) devices and assemblies available from texas instruments. ti is a trademark of texas instruments incorporated. gnd mode pi abin gt ps pd s3 s2 s1 t 12 13 1 2 3 4 5 6 7 8 9 10 11 bcp1 bcp2 cp2 cp1 csync cblk bf sc sc(90) abs0 abs1 14 15 16 17 gt3/sh2 sh1 x2 x1 43 42 41 40 39 44 38 fi e/l vds hcr vcr gt2 gt1/sh3 vgate hgate clk2m v high gps sb gp vd vd2 whta 36 35 34 37 18 19 20 21 22 cc fs package (top view) 33 32 31 30 29 28 27 26 25 24 23 production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters.
sn28835 1/2-inch ntsc timer socs023b february 1991 2 post office box 655303 ? dallas, texas 75265 functional block diagram oscillator divide by 7 14.318 mhz 2.045 mhz divide by 4, phase shift horizontal counter vertical counter clock generator antiblooming generator serial generator decoder 27 29 31 28 23 1 bcp1 bcp2 cp1 cp2 csync cblk bf vd fi vgate hgate whta vd2 pd gt pi ps t s1 s2 s3 sh1 gt3/sh2 gt1/sh3 gt2 24 25 26 36 37 38 39 30 abin 13 15 42 14 gps gp vds sb abs0 abs1 10 11 mode e/l 32 43 hcr 41 vcr 40 x1 34 x2 35 9 sc(90) 8 sc 21 clk2m 2 4 3 5 6 7 16 44 19 20 18 17
the levels on these two terminals determine which of the four antiblooming modes is selected: abs1 abs0 operation l l no abg pulses l h 2-mhz burst of abg pulses h l 1-mhz burst of abg pulses h h 1-mhz continuous abg pulses sn28835 1/2-inch ntsc timer socs023b february 1991 3 post office box 655303 ? dallas, texas 75265 terminal functions terminal i/o description name no. i/o description abin 30 o antiblooming in abs0 10 i abs1 11 i bcp1 1 o optical black clamp bcp2 2 o optical black clamp bf 7 o burst flag cblk 6 o composite blank clk2m 21 o 2-mhz clock cp1 4 o clamp cp2 3 o clamp csync 5 o composite sync e/l 43 i delay select for s1, s2, s3. when e/l is high, the three serial-transfer pulses occur early relative to the sample-and-hold pulses sh1, sh2, and sh3. when e/l is low, the three serial-transfer pulses occur late relative to the sample-and-hold pulses. fi 44 o field index gnd 33 ground gp 15 i exposure control: gp gates the ps and pi outputs (see the description of gps) gps 13 i when gps is high, the timer operates in the normal-integration-time mode (t int = 16.67 ms) and vd is connected internally to gp. to operate the imager in the variable-integration-time mode, gps must be held low and a user-defined logic circuit must be inserted between vd and gp to vary the integration time (see figure 1). gt 29 o tms3473b parallel-driver midsel input switch gt1/sh3 38 o gt1/sh3 is a logic signal for both y gate 1 of the tl1051 video preprocessor and sample-and-hold channel 3 of the tl1593 3-channel sample-and-hold circuit. gt2 39 o y gate 2 for the tl1051 video preprocessor gt3/sh2 37 o gt3/sh2 is a logic signal for both y gate 3 and sample-and-hold channel 2 of the tl1051 video preprocessor. hcr 41 i horizontal-counter reset hgate 20 o decoded h count signal. hgate is a test point and is not used in normal operation. high 12 i not used (tie high) mode 32 i tc243/tc245 ccd select. when mode is low, the tc244/245 ccd imager is selected; when mode is high, the tc242/243 is selected (see the appropriate data sheets for imager differences). pd 27 o power down. a low-logic level on pd causes the device to enter a low power-consumption mode. pi 31 o parallel-image-area gate clock ps 28 o parallel-storage-area gate clock sb 14 i standby-mode select. when sb is high, normal operation is selected; when sb is low, the power-down mode is selected. sc 8 o subcarrier sc(90) 9 o subcarrier phase shifted by 90 degrees sh1 36 o sample and hold 1
sn28835 1/2-inch ntsc timer socs023b february 1991 4 post office box 655303 ? dallas, texas 75265 terminal functions (continued) terminal i/o description name no. i/o description s1 24 o serial clock 1 s2 25 o serial clock 2 s3 26 o serial clock 3 t 23 o transfer-gate clock v cc 22 dc power vcr 40 i vertical-counter reset vd 16 o vertical drive vds 42 i vertical-dump speed. when vds is high, the vertical-dump frequency is 3.58 mhz; when vds is low, the vertical-dump frequency is 2 mhz. vd2 17 o real-display-area signal. vd2 is a test point and is not used in normal operation. vgate 19 o decoded v count signal. vgate is a test point and is not used in normal operation. whta 18 o whta is a test point and is not used in normal operation. x1 34 crystal oscillator (see figure 2) x2 35 cr y stal oscillator (see fig u re 2) 12 3 t int flush pulses transfer pulse gp figure 1. gp flush and transfer pulses
sn28835 1/2-inch ntsc timer socs023b february 1991 5 post office box 655303 ? dallas, texas 75265 variable-integration-time mode in addition to the normal tv mode of operation, the sn28835 timing generator offers an optional variable-integration mode for use with the tc244 and tc245 ccd area-array image sensors. the variable-integration mode is selected by applying a low-logic level to gps. this low-logic level disables the vertical-drive (vd) signal from controlling, internal to the timer, the image-area and storage-area parallel transfer signal (gp). prior to the start of a new integration period, the charge that has accumulated in the image area must be transferred out. to flush this previous signal or dark-current charge from the image area, gp is pulsed low two times. each low pulse generates 256 image-area and storage-area gate and transfer signals that shift the unwanted charge into the clearing drain. this clearing function should be performed during the high time of the vd signal (see figure 3 through figure 12). the new integration period continues as long as gp remains high. gps must be held at a low-logic level to prevent vd from controlling gp internally. the integration ceases and the readout occurs when vd and gp are pulsed low simultaneously; this is accomplished by taking gps to a high-logic level. the readout timing is dependent on the vertical-drive pulse; this means that the total-integration time is a multiple of 1/60 of a second plus the time interval between the last gp low pulse and the next vd low pulse. the image readout occurs within the normal 1/60-second readout interval. if the integration time is less than 1/60 of a second, normal output operation occurs; if the integration time is greater than 1/60 of a second, a frame buffer may be required to capture the image. integration times greater than 1/60 of a second result in image degradation at temperatures greater than 25 c due to dark-current generation. the degradation is seen as a decrease in dynamic range (contrast) and an increase in noise. it is recommended that the image sensor be cooled for long-exposure operation. the dark-current generation is reduced by a factor of two for each 7 c temperature decrease. the sensor operates at 30 c. cooling can be accomplished by using a thermoelectric or peltier cooler attached to the image sensor. condensation on the header must be prevented by isolating the cooled sensor from moist air. vacuum isolation is preferred; however, the continual flushing of dry nitrogen across the header can also prevent condensation. x1 x2 34 35 c1 40 pf c2 40 pf sn28835 note: the sn28835 is designed for use with a crystal oscillator. the x1 and x2 terminals should not connect directly to external driver outputs. figure 2. connection of an external crystal oscillator to the sn28835
sn28835 1/2-inch ntsc timer socs023b february 1991 6 post office box 655303 ? dallas, texas 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) 2 supply voltage range, v cc (see note 1) 0.3 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage range, v i 0.3 v to v cc + 0.3 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output voltage range, v o 0.3 v to v cc + 0.3 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous total power dissipation at (or below) t a = 25 c 300 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operating free-air temperature range, t a 20 c to 45 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg 55 c to 125 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 stresses beyond those listed under aabsolute maximum ratingso may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditi onso is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. note 1: all voltage values are with respect to gnd. recommended operating conditions min nom max unit supply voltage, v cc 4.5 5 5.5 v high-level input voltage, v ih v cc x 0.7 v low-level input voltage, v il 0.8 v operating frequency 14.318 mhz power-up time 300 m s operating free-air temperature, t a 20 45 c electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) 3 parameter test conditions min typ max unit v oh gt3/sh2 and gt1/sh3 v cc = 4.5 v, i oh = 4 ma 3.5 v v oh all other outputs v cc = 4.5 v, i oh = 2 ma 3.5 v v ol gt3/sh2 and gt1/sh3 v cc = 4.5 v, i ol = 4 ma 0.5 v v ol all other outputs v cc = 4.5 v, i ol = 2 ma 0.5 v i ih v ih = 5 v 1 m a i il v il = 0 30 200 500 m a i cc(av) average supply current 10 30 ma i cc(s) standby supply current 1 ma 3 the sb input is a schmitt-trigger input with 0.1-v to 1-v hysteresis. all inputs except x1 have pullup-current sources. switching characteristics over recommended ranges of supply voltage and operating free-air temperature parameter test conditions min typ max unit f lk frequency sc, sc(90) 3.579545 mhz f clock freq u enc y s1, s2, s3, sh1, gt2, gt1/sh3, gt3/sh2 c l =50 p f 4.772727 mh z t pulse duration sc, sc(90) c l = 50 pf 140 ns t w p u lse d u ration s1, s2, s3, sh1, gt2, gt1/sh3, gt3/sh2 70 ns t rise time gt1sh3 and gt3sh2 10 ns t r rise time all other outputs c l =50 p f 50 ns t f fall time gt1sh3 and gt3sh2 c l = 50 pf 10 ns t f fall time all other outputs 50 ns
sn28835 1/2-inch ntsc timer socs023b february 1991 7 post office box 655303 ? dallas, texas 75265 parameter measurement information 1 line = 63.55 m s 1 frame = 525 lines (525) clk2m ps,t abin gt pi gt1/sh3 sh1,gt3/sh2, gt2 s1,s2,s3 sc,sc(90) hgate vgate vd2 bcp2 bcp1 bf cblk csync cp2 cp1 fi vd 523 521 continuous 279 262 524 9 0 0 continuous 258.5 27 521 260 259 27 26 522.5 521.5 eq vs eq eq vs eq 20 0 272 262 9 524 even field odd field 0 268.5 262.5 6 0 288 280 275 270 265 260 256 30 25 20 15 10 5 0 17 gp gps 268.5 262.5 6 0 vertical scale 2 2 525 intervals equal 33.3 ms equals 1 tv frame figure 3. vertical timing, normal-integration mode
sn28835 1/2-inch ntsc timer socs023b february 1991 8 post office box 655303 ? dallas, texas 75265 parameter measurement information gt2 sc,sc(90) clk2m t ps s1, s2, s3 hgate bcp2 bcp1 bf cp2 cp1 horizontal scale 2 (130) continuous continuous 20 14 22 0 13 3 68 58 3 123 73 68 8 3 21 0 13 3 70 65 60 55 30 25 20 15 10 5 0 125 120 4.77273 mhz 4.77273 mhz 4.77273 mhz 35 791113 35 79 11 1 13 15 csync 3 sh1,gt3/sh2, gt1/sh3 75 95 98 case 1 case 2 case 3 cblk 2 130 intervals equal 63.55 m s equals one horizontal-scan line 3 csync varies depending on which horizontal-scan line of a 262.5-line tv field is being examined: ? case 1 depicts the equalizing pulses that occur during horizontal-scan lines 1, 2, 3, 7, 8, and 9. ? case 2 depicts the vertical serration pulses that occur during horizontal-scan lines 4, 5, and 6. ? case 3 applies to all remaining horizontal-scan lines. figure 4. horizontal timing
sn28835 1/2-inch ntsc timer socs023b february 1991 9 post office box 655303 ? dallas, texas 75265 parameter measurement information cp2 cblk bcp2 bcp1 y out3 out2 out1 gt2 gt1/sh3 gt3/sh2 sh1 s3 s2 s1 horizontal scale 3 master clock 2 (1) : dummy (2) : dummy (3) : half dark 7 6 5 4 3 2 1 140 160 150 130 120 110 100 23 22 21 20 19 18 17 16 15 14 0 1 2 3 4 5 6 7 8 9 10 1112 1314 1516 17 1819 20 21 1 2 3 4 5 6 7 8 9 10 1112 1314 15 16 17 1819 20 21 12345678 9 222324 (1) 3 2 11 (3) (2) 7 6 5 4 3 2 18 dark dummy active 2 910 master-clock periods equal 63.55 m s equals one horizontal-scan line 3 130 intervals equal 63.55 m s equals one horizontal-scan line figure 5. serial and sample-and-hold timing at start of horizontal transfer
sn28835 1/2-inch ntsc timer socs023b february 1991 10 post office box 655303 ? dallas, texas 75265 parameter measurement information gt2 gt1/sh3 gt3/sh2 sh1 late s1 s2 s3 early s3 s2 s1 horizontal scale 2 acceptable 17 16 15 5 ns 5 ns 5 ns 35 10 ns 5 ns 5 ns 5 ns 10 ns 5 ns 5 ns 5 ns 5 ns 5 ns 5 ns master clock 3 2 130 intervals equal 63.55 m s equals one horizontal-scan line 3 910 master-clock periods equal 63.55 m s equals one horizontal-scan line figure 6. timing for s and sh signals using both early and late options
sn28835 1/2-inch ntsc timer socs023b february 1991 11 post office box 655303 ? dallas, texas 75265 parameter measurement information abin timing at the start of h horizontal scale 2 cblk bcp1 abin vd abin timing at the start of v 1 mhz (always free running) (130) 26 24 22 20 18 16 14 12 10 8 6 4 2 0 128 126 124 abin (mode 0) abin (mode 1) abin (mode 2) abin (mode 3) (modes 1 or 2) 2 130 intervals equal 63.55 m s equals one horizontal-scan line note: gps is high (vd is connected to gp internally) antiblooming-mode selection mode 3 abs1 abs0 abin 0 l l low 1 l h 2-mhz burst 2 h l 1-mhz burst 3 h h 1-mhz free running 3 in mode 2, the duty cycle is 43%; in all other modes, the duty cycle is 50%. figure 7. antiblooming timing at start of horizontal transfer
sn28835 1/2-inch ntsc timer socs023b february 1991 12 post office box 655303 ? dallas, texas 75265 parameter measurement information v ss inlvl +v 244 243 12 odd 244 244 243 2 1 12 or 1024 244 or 256 2 1 244 243 2 1 (driver output) dpi abin gt pi ps t vd vertical-dump frequency (3.58 mhz or 2 mhz) even odd even gp figure 8. pi, ps, t, and abin timing notes: a. when the vertical-dump frequency is 2 mhz (chosen by a low level on vds), the duty cycle of t, ps, and pi is 4/7 high and 3/7 low; the duty cycle is 50% for a vertical-dump frequency of 3.58 mhz. b. when gps is high, vd is connected internally to gp. c. neither sc nor sc(90) is used for the 3.58-mhz clock. d. gp goes low when vd is low. pi, ps, t, and gt begin clocking after vd goes high. e. the 90 phase shift between t, ps, and pi pulses is equal to one 14-mhz crystal-oscillator clock period.
sn28835 1/2-inch ntsc timer socs023b february 1991 13 post office box 655303 ? dallas, texas 75265 parameter measurement information refresh pulses pd abin gt s1, s2, s3 ps,t 244 pulses 1024 pulses (see note b) pi sb see note c standby operation abin gt s1, s2, s3 ps,t 244 pulses 1024 pulses pi pd sb (see note a) power power-up operation vd (see note b) vd (see note d) gps gp gps refresh pulses (see note b) gp figure 9. power-up and standby timing notes: a. a 0.1- m f capacitor is connected between sb and gnd. b. in both powerup and standby operation, 1024 refresh pulses are generated on pi, ps, and t even if vd is not connected interna lly to gp. c. when sb is low, abin, gt, pd , pi, ps, s1, s2, s3, and t are all low. d. vd is connected internally to gp (gps is high).
sn28835 1/2-inch ntsc timer socs023b february 1991 14 post office box 655303 ? dallas, texas 75265 parameter measurement information vd gp pi ps,t gt abin bcp1, bcp2 mode operation variable-integration-time (see note b) 256 pulses (see note a) 244 pulses operation gps normal operation see note c figure 10. timing normal operation versus variable-integration-time operation notes: a. when vd is low and gp level changes from high to low, 244 pulses are generated on pi, ps, and t. b. when gp goes low, 256 pulses are generated on pi, ps, and t. c. depending on the shutter design, gps can either be held low or clocked during variable-integration-mode operation. if gps is clocked, vd follows gp during the intervals in which gps is high.
sn28835 1/2-inch ntsc timer socs023b february 1991 15 post office box 655303 ? dallas, texas 75265 parameter measurement information operation of vcr csync vcr internal vertical counter (see note a) 10 9 8 7 6 csync hcr horizontal scale 2 operation of hcr 17 15 13 11 9 7 5 3 equalization pulses figure 11. horizontal and vertical reset timing 2 130 intervals equals 63.55 m s equals one horizontal-scan line note a: the internal vertical counter is preset to the value 6 (indicating the end of vertical sync) when vcr transitions from l ow to high. immediately following the low-to-high transition on vcr, horizontal scanning commences on line 7 of the frame. sc(90) sc figure 12. sc and sc(90) timing
sn28835 1/2-inch ntsc timer socs023b february 1991 16 post office box 655303 ? dallas, texas 75265 mechanical data fs/s-pqfp-g44 plastic quad flatpack 4040160/a10/93 1,50 1,10 18,20 17,40 33 23 34 44 111 22 12 2,30 max 0,10 0,20 1,00 typ sq 14,20 max sq 2,20 max 0,55 max 0 10 seating plane 0,10 min 0,10 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice.
important notice texas instruments and its subsidiaries (ti) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. ti warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with ti's standard warranty. testing and other quality control techniques are utilized to the extent ti deems necessary to support this warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage (acritical applicationso). ti semiconductor products are not designed, authorized, or warranted to be suitable for use in life-support devices or systems or other critical applications. inclusion of ti products in such applications is understood to be fully at the customer's risk. in order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. ti assumes no liability for applications assistance or customer product design. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of ti covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. ti's publication of information regarding any third party's products or services does not constitute ti's approval, warranty or endorsement thereof. copyright ? 1998, texas instruments incorporated

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